A pipelined ADC (analog to digital converter) comprises a number of pipelined conversion stages. Each stage generates one or a few output bits, typically 1.5 bits, and amplifies the signal such that the next stage operates on a sub-range of the voltage range seen by the previous stage. Each stage generally comprises a flash analog to digital converter that generally compares the input signal with two or more threshold voltages to generate the output bits, and a MDAC (multiplying digital to analog converter), which converts the generated output bits back into a voltage level to be subtracted from the input voltage, the resulting residue voltage level being passed to the next stage. In particular, the MDAC generally amplifies the residue, which relaxes the noise constraints of the subsequent stages, leading to reduced power consumption and size. Advantageously, the MDAC holds the residue, meaning that the subsequent stages see a settled input.
To implement the MDAC of each stage of a pipelined converter, it has been proposed to use a switched capacitor solution according to which, during one phase, the input voltage is sampled by capacitors while the flash ADC quantizes the input voltage, and then during another phase, the residue voltage settles to its final level. In particular, the residue is generated by coupling the capacitors to one of a number of reference voltages selected based on the flash quantization.
A difficulty with such an approach is that the charge demand from the reference voltages is signal dependent. In other words, depending on the result of the flash quantization, more or less charge will be drawn from each reference voltage rail. Thus, adequate time should be left between each sampling phase to permit the reference voltages to settle back to their correct levels, as otherwise the signature left on reference voltage rails risks causing interference from one sampling phase to the next, thereby introducing errors in the generated residue voltage levels. However, providing an adequate settling time means slowing the bit rate of the converter.